Currently, liquid crystal display technology is more and more widely used in various fields of life. The liquid crystal display technology generally includes a-Si (amorphous silicon) thin film transistor liquid crystal display (TFT-LCD) and low temperature poly-silicon (LTPS) thin film transistor liquid crystal display (TFT-LCD).
In the prior art, the a-Si TFT-LCD cannot meet the requirements on low-profile, power saving and high image quality due to the limitation of the carrier mobility, however, the LTPS TFT-LCD has increasingly become mainstream product in liquid crystal display due to its advantages such as high image refreshing speed, high brightness and high definition. However, the method for manufacturing the LTPS TFT-LCD is complex, and generally requires 8 to 10 photolithographs, therefore, reducing the number of mask plates so as to decrease manufacturing cost has become a requirement to be met urgently for manufacturers.
With increasing in integration of semiconductor devices, a P type transistor and an N type transistor with an advantage of low energy consumption are widely used in manufacturing the array substrate of the LTPS TFT-LCD.
As shown in FIG. 1 and FIG. 2, a typical array substrate including a P type transistor and N type transistors comprises: a base substrate 1; light-shielding layers 2 provided on the base substrate; a buffer layer 3 provided on the light-shielding layers 2; a P type transistor and N type transistors provided on the buffer layer 3, wherein N type transistors are provided in a display region, and a N type transistor and a P type transistor are provided in a driving region. The light-shielding layers 2 are provided below the active layers of the N type transistors in the display region of the array substrate, wherein the active layer of the N type transistor sequentially includes a conductive region 19 and heavy doping regions 6 of the N type transistor from the center to two sides thereof, the conductive region 19 includes a channel region 4 of the N type transistor, light doping regions 5 of the N type transistor, and the active layer of the P type transistor includes a channel region 8 of the P type transistor in the center and heavy doping regions 7 of the P type transistor at ends thereof.
As shown in FIG. 1 and FIG. 2, with respect to each of the N type transistor and the P type transistor, an insulation layer 9 is provided on the active layer, a gate 10 is provided on the insulation layer 9, a source 12 and a drain 13 are provided above the gate 10, the source 12 and the drain 13 are connected to the heavy doping regions at two ends respectively, and a planarization layer 14 is provided on the source 12 and the drain 13.
Since the carrier mobility of the N type transistor is high, the transistors in the display region of the array substrate of the LTPS TFT-LCD are generally the N type transistors. If light is incident onto the active layer of the N type transistor, a leakage current may be generated in the conductive region 19 of the active layer (including the channel region 4 and the light doping regions 5) of the N type transistor, thus a pixel voltage for charging pixel electrodes may be influenced, resulting in a poor display characteristic of the display (degraded image quality). As light-induced leakage current of the N type transistor in the display region is great, a light-shielding layer 2 is commonly formed under the N type transistor in the display region using a light-shielding layer mask plate 15 as shown in FIG. 1 to reduce the light-induced leakage current.
As shown in FIG. 1 and FIG. 2, as the P type transistor and the N type transistor have advantages of low power consumption and simplicity in circuit structure, transistors in the driving region of the array substrate of the LTPS TFT-LCD generally includes N type transistors and P type transistors. The driving region refers to a region which is positioned at the periphery of the liquid crystal display and shielded by a frame. As the driving region typically is not irradiated by light, therefore no light-shielding layer 2 is provided at the N type transistors.
In manufacturing the N type transistor and the P type transistor, it is required to perform a N type doping and a P type doping on the N type transistor and the P type transistor, respectively, so as to accurately adjust thresholds of the N type transistor and the P type transistor, so that the characteristics of the N type transistor and the P type transistor are symmetrical, thus power consumption of leakage current may be reduced. In the above respective dopings, a doping mask plate 16 shown in FIG. 2 is required, that is to say, the active layers of all of the transistors are doped first without using the doping mask plate 16, so that the transistors become N type transistors, then the doping mask plate 16 is used to shield portions except the P type transistor in the driving region and only the P type transistor is doped so as to convert into the P type transistor.
In summary, two mask plates are required for manufacturing the light-shielding layers 2 and doping the active layers in the prior art, therefore, the number of mask plates is relatively large.